Memory Specifications: datasheet parameters

There are many different specifications and parameters used in semiconductor memory datasheets: everything from the size and technology to the output performance, voltage rails, speed, timing and the like.

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Although many of the specifications and parameters used with semiconductor memories are common to all ICs. There are many specific memory specifications and parameters that are used.

Understanding the different semiconductor memory specifications and parameters enables the right chip to be selected out of the enormous variety that is available.

Major memory specifications & parameters

There are many semiconductor memory parameters that can be specified. Normally these all appear in the datasheet for a given memory. However some of the key memory specifications are outlined below:

Memory type: Obviously the type of memory has a major bearing on the application. Different memories have different properties and therefore significantly differnet specifications and parameters. The first choice of any memory for use within a system is the type of memory. . . . . Read more about the semiconductor memory types & technologies.
Memory size specification: The specification for the memory size is possibly the most key parameters to be specified. The way in which the memory is specified is standardised by JEDEC (JEDEC Standard 100B.01) and this format is used virtually universally for memory specifications:
- b - bit: This is the notation refers to a single element of data i.e. a digit which is 1 or zero.
- B- byte: The definition for this is a binary character string which is normally shorter than a computer word. A byte is normally eight bits.
The definitions for the multipliers also needs to be understood as the standard multipliers do not correspond exactly to the decimal multipliers as they are based on a binary format:
- k - kilo: The kilo multiplier is equal to 1,024. This corresponds to 2¹⁰
- M - Mega: The Mega multiplier is equal to 1 048 576. This corresponds to 2²⁰ or k².
- G - Giga: The Giga multiplier is equal to 1 073 741 824. This corresponds to 2³⁰ or k³.
- T - Tera: The Tera multiplier is equal to 1 099 511 627 776. This corresponds to 2⁴⁰ or k⁴.
Thus memories would be specified in the format of 32Mb for a 32 megabit memory and 512MB for a 512 Megabyte memory, etc..
Memory speed: Another key memory specification is the memory speed. This is normally quoted as the rate at which the memory can be clocked and is given as a frequency, e.g. 400 MHz, etc.. Often the speed will be incorporated into the memory type. For example for DDR style memories it is appended to the memory style ID, e.g. DDR-400 is a 400 MHz memory. However it is important to note that the real clock of DDR style memories is half that of the labelled clock speed - DDR-400 memories operate at 200 MHz.
Memory timing specifications: This category of memory specifications is of great importance because it will often determine the overall speed of operation of a processor system. If large amounts of data need to be accessed then the speed of recovery is crucial. Delays will slow the operation of the system. There are a number of different types of memory speed specification, and they will be dependent upon the type of memory used:
- CAS Latency, tCL: Column Address Strobe or Column Address Select, CAS refers to the time in clock cycles between the initiation of a read command and when the read is performed. The CAS latency time is effectively the response delay within the within the memory. This is a key indicator of the memory performance.
- tRAS Timing: Min RAS Active Time. This indicates how long the memory has to wait until the next memory caccess can be initiated. It is effectively, the amount of time between a row being activated by pre-charge and deactivated. A row cannot be deactivated until tRAS has completed. The lower this is, the faster the performance, but if it is set too low, it can cause data corruption by deactivating the row too soon.
- tRCD Timing: This memory specification for timing refers to the RAS to CAS Delay, i.e. the Row Address Strobe/Select to Column Address Strobe/Select. It is the time delay in cycles between the activation of the RAS line and the column CAS where the data is stored in the matrix.
- tRP Timing: Row Precharge Time. This is the minimum time between active commands and the read/writes of the next bank on the memory module. It is the time between disabling the access line of the data to the beginning of another read cycle.
Supply voltage: With many logic families not running on much lower voltages to conserve power and increase speed, it is necessary to ensure that the memory family adopted operates on the required voltage supply. Not only will this ensure that the memory runs from the correct voltage, but it is also able to interface properly with the other components.